Apple and OpenAI successively place orders! TSMC's "Emmy-level" A16 chip creates a sensation before mass production

Wallstreetcn
2024.09.02 01:44
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OpenAI's ASIC chips will collaborate with Broadcom, Marvell, and others to develop, and are scheduled to be successively produced on TSMC's 3-nanometer family and subsequent A16 processes

TSMC's next-generation Emi-grade process chip A16 is still nearly two years away from expected mass production, but it has already gained favor from many tech giants.

On September 2nd, according to Taiwan's "Economic Daily News," not only has major customer Apple reserved the first batch of TSMC's A16 production capacity, but OpenAI has also joined in reserving A16 capacity due to its long-term demand for self-developed AI chips.

Earlier this year, there were reports that in order to reduce reliance on externally purchased AI chips, OpenAI CEO Sam Altman planned to raise $7 trillion to build a wafer fab for the research and production of its own AI chips. However, this plan has now changed.

The above report cited industry sources saying that OpenAI had initially actively negotiated with TSMC to cooperate in building a dedicated wafer fab, but after evaluating the development benefits, this plan has been put on hold:

Strategically, OpenAI is collaborating with American companies such as Broadcom and Marvell to develop its own ASIC chips, with OpenAI expected to become one of Broadcom's top four customers.

As Broadcom and Marvell are also long-term customers of TSMC, the ASIC chips developed by the two American companies to assist OpenAI, according to the chip design plan, are scheduled to be produced in TSMC's 3nm family and subsequent A16 processes.

A16 is currently the most advanced process node disclosed by TSMC and marks TSMC's entry into the Emi process, with mass production scheduled for the second half of 2026.

According to TSMC, A16 adopts Super Power Rail (SPR) technology, which moves power lines to the back of the wafer to free up more signal line layout space on the front of the wafer to enhance logic density and efficiency. SPR can also significantly reduce IR drop, thereby improving power efficiency.

Compared to the N2P process, A16 offers an 8-10% speed increase at the same Vdd (operating voltage), a 15-20% power reduction at the same speed, and a 1.10x increase in chip density to support data center products.