The chip industry is already focusing on NVIDIA's next-generation chips: Rubin
Morgan Stanley expects that the 3nm Rubin GPU will enter the tape-out stage in the second half of 2025, six months earlier than previously scheduled. According to supply chain investigations, the chip size of Rubin will be twice that of Blackwell, containing four computing chips, which is double that of Blackwell
Morgan Stanley stated that NVIDIA's next-generation Rubin GPU has begun preparations six months ahead of schedule, with the expected launch time moved up from the first half of 2026 to the second half of 2025. Due to the use of 3nm technology, CPO (Chip-on-Package Optical Components), and HBM4 (sixth-generation high bandwidth memory), the chip area of the new generation GPU will be twice that of the previous generation Blackwell, and related industry chain companies are expected to benefit.
Morgan Stanley analyst Charlie Chan noted in a report on December 2 that while the output of Blackwell chips is still increasing, considering the complexity of the new chips, TSMC and the supply chain are already preparing for the launch of NVIDIA's next-generation Rubin chips. The 3nm Rubin GPU is expected to enter the tape-out phase in the second half of 2025, about six months earlier than previously scheduled.
Morgan Stanley stated that due to the migration to 3nm process, the adoption of CPO and HBM4, Rubin will be a powerful chip. According to supply chain surveys, the chip size of Rubin will be nearly twice that of Blackwell, and the Rubin chip may contain four computing chips, which is double that of Blackwell.
Analysts currently expect that due to the increased chip area, TSMC will further expand its CoWoS (Chip on Wafer Substrate) capacity in 2026. The company is expected to start placing orders for 2026 with equipment suppliers in mid-2025, depending on the sustainability of AI capital expenditures.
In terms of the supply chain, analysts believe that ASMPT is slightly lagging in the certification of TCB tools for Rubin. TCB (Thermal Compression Bonding) is the process required for the CoW (Chip on Wafer) of the Rubin GPU. K&S previously announced that it received TSMC's no-solder TCB orders for CoW in November, while ASMPT stated that it is still in communication with TSMC regarding CoW certification.
Morgan Stanley believes that ASMPT still has the opportunity to complete certification by the end of this year, and that low-volume procurement of the company's equipment may be realized in the second half of 2025. Industry surveys show that TSMC's first batch of orders for no-solder TCB for CoW has fewer tools ordered through K&S, with fewer than 10 expected in 2025. As the Rubin GPU is expected to enter mass production in 2026, order volumes may increase in 2026.
Another structural opportunity brought by the new GPU is the extended testing time. Morgan Stanley analysts stated that currently, Blackwell (which has a testing time three times longer than Hopper) and MI355 (which has a testing time twice as long) both require longer testing times Due to strong demand, the delivery time for the new Advantest testing instruments has been extended from 3 months to 6 months.
In the long term, some AI-specific integrated circuits (ASICs), such as AWS's 3nm AI accelerator, may begin burn-in testing. According to supply chain investigations, all final testing for Blackwell will continue at KYEC, and it is expected that by 2025, shipments of the B200/300 (dual-chip version) may reach approximately 5 million units, based on TSMC's CoWoS-L capacity.