Nvidia, AMD, and Intel rarely join forces to invest in a photonic chip company

In recent years, as competition in AI has intensified, both traditional and emerging processor giants have engaged in fierce competition around CPUs, GPUs, and AI accelerators. Particularly, the three iconic giants AMD, Intel, and NVIDIA have attracted significant attention due to their competition involving the catch-up of latecomers, the aggressive emergence of new markets, and the reluctance of old giants to fall behind. It is well known that these three companies are engaged in both overt and covert battles surrounding artificial intelligence and PCs.

However, recently, these three companies have rarely joined forces to invest in a photonic chip startup named Ayar Labs.

Three Chip Giants Eye Optical Interconnects

Ayar Labs announced today that it has secured $155 million in funding led by Advent Global Opportunities and Light Street Capital, aimed at leveraging its optical I/O technology to break the AI data movement bottleneck. This brings the company's total funding to $370 million and increases its valuation to over $1 billion.

As Ayar Labs stated, the scale of this funding round and the quality of the investors mark another significant milestone for Ayar Labs, as the company prepares its optical solutions for large-scale production in strategic alignment with customer roadmaps. The company noted that well-known companies participating in this funding round include the currently hottest chip giants AMD Ventures, Intel Capital, and NVIDIA, along with other new strategic and financial investors such as 3M Ventures and Autopilot. Notably, previously, Ayar Labs had also received funding from numerous well-known companies and institutions, including Applied Ventures LLC, Axial Partners, Boardman Bay Capital Management, GlobalFoundries, IAG Capital Partners, Lockheed Martin Ventures, Playground Global, and VentureTech Alliance.

Mark Wade, CEO and co-founder of Ayar Labs, stated, "The support from leading GPU providers AMD and NVIDIA, as well as semiconductor foundries GlobalFoundries, Intel Foundry, and TSMC, along with Advent, Light Street, and our other investors, highlights the potential of our optical I/O technology to redefine the future of AI infrastructure." "We are very fortunate that in this funding round, Light Street's deep expertise in technology-specific investments and Advent's strong background in private equity and growth equity have provided us with support." According to relevant information, Ayar Labs was founded in 2015, and its team consists of many top technical experts from Intel, IBM, Micron, Penguin, Massachusetts Institute of Technology, Berkeley, and Stanford.

In the introduction on its official website, Ayar Labs positions itself as a leader in the field of optical interconnect solutions, claiming that the data transmission speed of its products is comparable to AI. The company stated that upon realizing the complexity and scale of AI models are growing at a pace that traditional interconnect technologies cannot handle, they developed the industry's first optical I/O solution, enabling customers to maximize the computational efficiency and performance of their growing AI infrastructure while reducing costs, latency, and power consumption. Ayar Labs pointed out that the company's optical I/O solution is based on open standards and optimized for AI training and inference, boasting a robust ecosystem that allows for seamless large-scale integration into AI systems.

As shown in the above image, Ayar Labs stated that the origin of the company's story can be traced back to a paper published in 2010 titled "Open foundry platform for high-performance electronic-photonic integration." The paper discusses photonic devices manufactured using the then commercially available 45 nm SOI-CMOS foundry process, which has a waveguide loss of 3 dB/cm. By leveraging existing front-end manufacturing processes, photonic devices are integrated on the same physical device layer as electronic devices, achieving a 4 ps logic level delay without degrading transistor performance.

In the paper, they showcased an 8-channel optical micro-ring resonator filter bank and optical modulators, all controlled by integrated digital circuits. By developing a device design method that does not require any changes to the foundry's infrastructure, a widely available high-performance photonic-electronic integrated circuit platform can be achieved.

During the discussion phase of the paper, they emphasized that the electronic-photonic platform demonstrated is an accessible, low-cost method of utilizing existing electronic foundry infrastructure to manufacture high-performance photonic devices and state-of-the-art CMOS transistors. Using thin SOI-CMOS processes requires no internal changes to the foundry, and only simple post-processing is needed to achieve good passive photonic performance, eliminating the waveguide loss bottleneck present in previous work. The devices discussed in the paper, such as filter bank demultiplexers and modulators, as well as the integrated photodetectors currently under development, form the foundation of the photonic interconnect platform in advanced electronic processes, which can be used to manufacture today's microprocessors The universal nature of this foundry platform allows us to utilize cutting-edge technology, which will greatly promote the research of new electro-optical systems on chips in the entire VLSI and photonic systems and applications field.

Based on this research, Ayar Labs was founded in 2015 and received seed round investment the following year (GlobalFoundries participated in the seed round financing).

Ayar Labs, Focus on the Problems to Solve

Before specifically introducing Ayar Labs' products, let's first discuss the problems they aim to solve.

As mentioned in many previous reports, high-performance computing engines face bandwidth and signal issues, which is no secret. If you want to quickly input and output data at a reasonable capacity per second, keeping tens of thousands of cores busy in the engine, you must connect them as tightly as possible if you insist on using copper wires, whether it's the wiring on the inserters for stacked memory or the wires going in and out of SerDes to connect the computing engines for parallel operation.

The problem lies in the excessive length of the wires. Each time you double the bandwidth, you must halve the wire length due to signal distortion. This is a problem of physics and materials science, and everyone knows that eventually, copper wires will be replaced by optical fibers. Moreover, due to the enormous bandwidth demand of artificial intelligence workloads, this seems to be an inevitable trend in the coming years.

Ayar Labs is precisely such a "light" participant, dedicated to breaking the past data transmission patterns.

It is understood that their goal is to place optical communication directly on the package, rather than being limited by IO density issues, data rate scaling, and the power inefficiency of electronic packaging to packaging interconnects. Ayar Labs' main point is that within a transmission range of 1cm to 10cm, optical IO is more efficient than current electronic systems. The best way to solve the data transmission power expansion problem is to switch to optical as long as you transmit data beyond this distance.

According to the well-known industry analysis firm Semianalysis, there are many benefits to switching to co-packaged optical devices. For example, data does not need to be sent from the processor to the network card, nor does it need to go through expensive optical transceivers. The processor itself can also save a significant amount of cost, as it does not have to dedicate too much chip area to large high-speed electrical SerDes.

Given that Ayar Labs has joined the open UCIe standard, Semianalysis believes that their chips will use this protocol as the foundational layer for interfacing with external company chips. UCIe supports many packaging options from Intel, ASE, and TSMC In terms of processors, Intel, AMD, Broadcom, Micron, MediaTek, and GUC are all members of the alliance. UCIe significantly lowers the entry barrier for integrating third-party chips into packages, which in turn should reduce the entry barrier for Ayar Labs to achieve design victories. Additionally, Ayar Labs explicitly supports high-density fan-out, Intel's EMIB, and other silicon interposer technologies.

Currently, Ayar Labs has two main products: one is the SuperNova light source—this is a remote light source external to the package, which can be viewed as a light source located somewhere outside the ASIC package; the other is the TeraPHY optical I/O chip, which contains approximately 70 million transistors and over 10,000 optical devices. It is reported that they integrate silicon photonic devices into CMOS processes to create the silicon chips that are sold as chips. This chip is integrated into the customer's SOC package.

From the official website, it can be seen that the SuperNova remote light source is the cornerstone of Ayar Labs' optical I/O solutions and is the industry's first 16-wavelength light source compliant with the CW-WDM MSA standard, capable of providing up to 16 wavelengths of light and powering up to 16 ports. When combined with Ayar Labs' TeraPHY optical I/O chipset, this solution offers 5 to 10 times higher bandwidth, 10 times lower latency, and 4 to 8 times higher energy efficiency compared to traditional interconnects (pluggable optical devices + electrical SerDes). Optical I/O eliminates I/O bottlenecks, surpasses process limitations, and unleashes innovative architectures for the next generation of AI architectures.

The TeraPHY optical I/O chipset is a compact, low-power, high-throughput alternative for copper backplanes and pluggable optical communications. The modular multi-port design of the TeraPHY chipset can support eight optical channels (equivalent to an x8 PCIe Gen5 link). This industry-first optical I/O chipset combines silicon photonics with standard CMOS manufacturing processes. It is suitable for existing system-level package architectures without requiring SoC customization.

According to the company's CEO Mark Wade, Ayar Labs' current primary business model is to sell actual products. He stated that a complete paradigm shift has occurred in the SOC field to drive the adoption of chiplets If you open the cover of an ASIC, you will see multiple chips inside. Thus, Ayar Labs sells the so-called "KGD" optical chips packaged for customers. When it comes to optical I/O chips, Ayar Labs sells them as revenue-generating products, and customers can purchase the chips directly from us.

Wade emphasized that Ayar Labs' market strategy focuses on solving the mass production and high-quality manufacturing issues in the field of photonics. We have established strategic partnerships with major companies such as GlobalFoundries, Applied Materials, Intel, and TSMC, and we are collaborating with all leading CMOS manufacturers.

Ayar Labs has also formed a strategic partnership with Nvidia, a leader in the large AI systems field, to integrate our technology into future AI systems. The company's direct customers are building SOCs and SOC systems, with a top-tier ecosystem that includes companies like Nvidia, AMD, Intel, Broadcom, and Qualcomm.

"It is crucial to have end customers building large-scale AI models, such as Anthropic and OpenAI. Data centers are facing many serious issues when trying to scale AI workloads. We found that these companies share a vision for the future similar to our predictions over the years, which confirms this," emphasized Ayar Labs CEO Mark Wade. "Our success depends on our ability to enter these fields. We are addressing challenges in photonic technology, particularly in mass production and high-quality manufacturing. This approach allows us to collaborate with key industry players while meeting the needs of end users, thereby pushing the boundaries of AI technology," Mark Wade continued.

Ayar Labs stated in August this year that it would release its optical I/O technology to replace copper wires within chips. The company has been developing technology to integrate optical I/O into chip structures and has researched this technology for over a decade. This technology allows for faster communication within chips, aiming to replace slower copper wires.

"With optical I/O, you can break through distances of tens or even hundreds of meters, and then connect more GPUs or accelerators," Wade said.

Is Large-Scale Commercialization Imminent?

It is easy to think that the investments from Nvidia, AMD, and Intel indicate that these companies are seeking to deploy TeraPHY optical transmission and its SuperNova laser source in their computing engines in some way. We know that their early investor HPE reached a strategic investment and collaboration agreement with Ayar Labs back in February 2022 to add silicon photonics to its "Rosetta" Slingshot interconnect.

However, when responding to inquiries from The Next Platform, Ayar Labs Vice President of Business Operations Terry Thorn joked, "They are all investors and companies, and we are exploring many interesting opportunities with them—most of which we currently cannot discuss." "We can imagine this situation happening, but there are many other ways to achieve co-packaged optical devices, and all three companies have a habit of inventing their own products.

In other words, through these investments, these chip companies may just want to gain a deeper understanding of what Ayar Labs is doing. But as Mark Wade mentioned in a previous interview, optical connections will be needed in many scenarios.

As he said, when Ayar Labs first started researching this issue, many early insights came from the high-performance computing community — you know, the large machines being built by national laboratories. These large systems first discovered that they had significant data movement issues, which began to become bottlenecks for the overall system performance. This is the period from 2010 to 2015 that Ayar Labs refers to as the "canary in the coal mine," when the status quo indicated problems with the underlying computing technology.

After that, as artificial intelligence workflows began to emerge, along with early workloads like image recognition and recommendation engines — but later, especially when transformer models went live and started enabling new AI applications, we entered the era of generative artificial intelligence. But the key is to realize that the computing systems that form the backbone of these AI computing systems look like high-performance computing architectures.

"Therefore, the same data movement challenges that occurred in high-performance computing a decade ago are now starting to appear in AI systems and becoming bottlenecks for overall system performance," Mark Wade emphasized.

Mark Wade pointed out that this is a multifaceted issue. You have to get people to transmit more bandwidth over longer distances under power constraints. Therefore, the power limitations of these systems are not infinite. There are thermal and power density issues at every level — chip level, package level, system board level, rack level. Thus, there are power issues at every level. Latency is where you need to pay closer attention.

"Nowadays, people use copper wires and electrical I/O to transmit high bandwidth in an electrical manner, and you often do things like adding error correction because you are trying to recover from all the inefficiencies and data corruption that occur when transmitting data electrically. In optics, you can elegantly solve this problem, thus eliminating the need for error correction. Therefore, you can achieve a more lightweight error correction architecture, but this will affect latency," Mark Wade said.

To achieve the above goals, Ayar Labs has been enriching its product line.

If you look at the roadmap, you will find that Ayar Labs doubles the bandwidth of each chip every few years. Their plan is to increase from 4 Tbps to 8 Tbps, then to 16 Tbps and 32 Tbps, which is the bandwidth per chip. Ayar Labs has also adjusted some vectors — the bandwidth per chip, the ability to instantiate multiple chips per package, expanding the overall package-level bandwidth, and the baseline bandwidth that can be released from the package. Ayar Labs' customers are usually concerned about how much bandwidth we can release from their packages and under what kind of power density constraints Especially with the development of artificial intelligence systems, higher bandwidth release in each package is becoming increasingly important, while also increasing the number of connections.

Currently, each chip from Ayar Labs has 8 ports, and each chip group has 8 ports. Assuming each package has 4 chip groups, your connection ports would be 32, allowing you to connect all these ports to different places.

Looking ahead, Wade stated, "The work we are currently doing in the lab with customers is actually aimed at achieving the first large-scale market deployment in two to three years."

In Conclusion

In fact, optics is not a new technology—fiber optics truly entered the technological field in the 1970s. We began building submarine cables and similar things, ultimately connecting to the internet. Optical technology is well-known.

However, the demand to directly remove data optically from computing packages is actually a relatively new phenomenon, related to the rapid deterioration of electrical I/O issues. Our applications require higher bandwidth and better energy efficiency—this is starting to break existing systems based on electrical I/O. But the challenge is that you can't just use the technology and products that people are familiar with for more standardized solutions, such as using Ethernet pluggable transceivers. If I move 100 Gbps, 400 Gbps, or 800 Gbps within a data center, these are already optical pluggable transceivers. The problem is that if you open these transceivers and look inside, you will find that they do not directly extend to the characteristics of computing structures.

Therefore, to achieve the above goals, in addition to facing issues such as size, number of components, cost structure, and how all these components are assembled, there are also problems like power efficiency, thermal sensitivity, and a series of issues related to "I cannot directly place the transceiver into the computing package."

"Therefore, we must invent a technology from scratch that has the right underlying characteristics: density, device size, energy efficiency, and more importantly, the ability to integrate into the manufacturing process, allowing it to operate at CMOS scale. We must master how to incorporate this technology into the package, as this is a truly large-scale application. All these characteristics are challenges at every step, and part of our company, as well as part of our efforts over the years, is actually about solving these problems step by step," Mark Wade stated.

Facing this market and opportunity, besides Ayar Labs, Lightmatter, Celestial AI, Eliyan, and domestic companies like XiZhi, along with a host of processors, foundries, and packaging factories, are all striving to make silicon photonics a bridge between computing engines and interconnects.

Source: [Semiconductor Industry Observation](https://mp.weixin.qq.com/s?__biz=Mzg2NDgzNTQ4MA==&mid=2247766724&idx=1&sn=eca58a5d133b0666cb3049bf6cc3e8da&chksm=cfd979e33fc18fd029a1754e31c9d0bdc51e079d27d1f5ff899b7d06cee2248bf877bedf0766&mpshare=1&scene=23&srcid=1212Zrq82ImmOy0kRDZ7q6yK&sharer_shareinfo=840a35f 6d6668d2069b05c4833e8943a&sharer_shareinfo_first=840a35f6d6668d2069b05c4833e8943a#rd), Original title: "Nvidia, AMD, and Intel Rarely Join Forces to Invest in a Photonic Chip Company"

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