Taiwan Semiconductor, did it succeed?

If we turn back time to five years ago in 2019, TSMC was still the global leader in wafer foundry, just as it is now. According to TSMC's financial report from that year, TSMC held a 52% market share in the entire semiconductor foundry sector. At that time, this Taiwanese wafer foundry giant's advanced processes were limited to the island of Taiwan.

Entering 2020, under the dual impact of the COVID-19 pandemic and geopolitical factors, TSMC announced plans to build factories in the United States, followed by Japan and Germany joining the race to attract TSMC. In no time, TSMC was flourishing everywhere. However, as we approach 2025, it seems that the tasks countries hoped TSMC would undertake have been accomplished with TSMC's collaborative efforts. Japan and the United States have already announced the start of chip mass production.

As of the third quarter, TSMC's market share has increased to 64.9%.

TSMC Begins Chip Mass Production in Japan

According to a recent report by Kyodo News, Taiwan Semiconductor Manufacturing Company has begun mass production of chips at its new wafer plant located in Kumamoto Prefecture, Japan.

Three years ago, the world's largest chip foundry, TSMC, established a semiconductor manufacturing company named JASM Inc. in Japan. This company is a joint venture between TSMC, Sony Group Corporation, and major automotive parts supplier Denso Corporation. TSMC broke ground on the Kumamoto plant in April 2022, and it was completed earlier this year.

The plant has over 480,000 square feet of cleanroom space suitable for housing chip manufacturing equipment. It manufactures logic chips based on manufacturing processes ranging from 28 nanometers to 12 nanometers. These technologies are several generations behind TSMC's latest three-nanometer node, but they are still widely used for circuits that prioritize cost-effectiveness over maximum performance.

The first customers of the new plant include Sony and Denso, with TSMC forming the JASM joint venture with these two companies. The plant will produce camera chips for Sony and processors optimized for automotive subsystems.

Automotive chips, especially those supporting sensitive components like brakes, must adhere to stricter reliability standards than other circuits. Many chips use a technique called lockstep processing to reduce the risk of errors. In lockstep mode, each computation is executed by at least two different cores, and the results are compared to identify inconsistencies.

Many automotive processors adopt a system-on-chip design that integrates the central processing unit with other components. In some cases, one of these components is a network accelerator optimized to coordinate data flow between vehicle subsystems. Some automotive processors also include cybersecurity and artificial intelligence modules.

In March of this year, TSMC announced plans to begin construction of a second wafer plant next to its new Kumamoto facility. This upcoming plant is expected to be operational by the end of 2027. It will be capable of manufacturing chips using 6-nanometer and 7-nanometer processes that the existing wafer plant does not support.

Once both plants are fully operational, they will have a capacity to produce 100,000 12-inch wafers per month. TSMC estimates that the construction cost of the plant will reach $20 billion. The Japanese government will provide billions of dollars in subsidies to support the project According to reports, Taiwan Semiconductor Manufacturing Company (TSMC) may further expand its manufacturing operations in Japan in the future. Earlier this year, CNBC reported that the company is considering the possibility of establishing an advanced chip packaging factory in Japan. Advanced chip packaging is a technology that can connect multiple silicon chips together to form a single processor.

TSMC may utilize this facility to manufacture CoWoS hardware. This is a packaging technology used for products such as Nvidia Corp.'s data center graphics cards. Since 2021, TSMC has been setting up advanced packaging research and development centers in Japan.

TSMC's U.S. Factory Also Achieved Success

After years of planning, construction, geopolitical maneuvering, and labor challenges, the world's largest semiconductor foundry, TSMC, will officially begin mass production at its advanced chip manufacturing plant in Phoenix in 2025. This factory represents the arrival of advanced chip manufacturing in the United States and serves as a test of whether the 2022 CHIPS and Science Act will help stabilize the semiconductor industry supply chain in the U.S. and its allies.

In late October 2024, the company announced that the output of its Arizona plant was 4% higher than that of its Taiwan plant, which is an early sign of the plant's efficiency. The current plant is capable of operating at a 4-nanometer node, a process used to manufacture Nvidia's cutting-edge GPUs. A second plant is planned to be operational by 2028, with plans to provide 2 or 3-nanometer node processes. Both 4-nanometer and more advanced 3-nanometer chips will begin mass production at TSMC's other plants in 2022, while 2-nanometer nodes will start mass production in Taiwan this year. In the future, the company also plans to open a third factory in the U.S. that will use more advanced technology.

This chip manufacturing giant is currently set to receive $6.6 billion in funding from the CHIPS and Science Act to build its first factory in Arizona. However, government funding is not the only reason for the semiconductor manufacturing industry's return to the U.S. TSMC produces 90% of the world's advanced chips, and American companies such as Apple, Nvidia, Google, Amazon, and Qualcomm rely on them. The chip shortage during the early economic shock of the COVID-19 pandemic left TSMC's customers and international policymakers uneasy.

TSMC announced its intention to invest in Arizona in 2020. TechInsights semiconductor analyst Dan Hutcheson stated, "The CHIPS Act did not make this plan a reality—companies are basically relocating on their own." He noted that major clients like Apple have been urging TSMC to build fabs elsewhere to minimize risks.

In addition to this factory, the company has two more factories in preparation in the U.S. These factories will produce advanced chips that are critical for artificial intelligence and defense systems.

In April of this year, TSMC released a press release stating that with the completion of the company's first fab and the ongoing construction of the second fab in Arizona, the completion of the third fab will bring TSMC's total capital expenditure in the Phoenix area of Arizona to over $65 billion, making it the largest foreign direct investment in Arizona's history and the largest foreign direct investment in greenfield projects in U.S. history According to TSMC's plan, the first wafer fab located in Arizona is expected to start production using 4nm technology in the first half of 2025. The second wafer fab will adopt the world's most advanced 2nm process technology, in addition to the previously announced 3nm technology, and will utilize next-generation nanosheet transistors, starting production in 2028. The third wafer fab will produce chips using 2nm or more advanced processes, beginning production by the end of 2020. Like all of TSMC's advanced wafer fabs, these three fabs will have cleanroom areas approximately twice the size of industry-standard logic wafer fabs.

It has been reported that these three wafer fabs are expected to create about 6,000 direct high-tech, high-paying jobs, building a workforce to support a vibrant and competitive global semiconductor ecosystem, enabling leading U.S. companies to access domestically manufactured cutting-edge semiconductor products and world-class semiconductor foundries. According to an analysis by the Greater Phoenix Economic Council, the increased investment in the three wafer fabs will create over 20,000 cumulative unique construction jobs, as well as tens of thousands of indirect supplier and consumer jobs.

TSMC is not falling behind in Taiwan

While TSMC is making strides in the U.S. and Japan, it is also not falling behind in its birthplace—Taiwan.

Earlier reports indicated that TSMC recently achieved a 60% yield in its 2nm trial production and plans to begin full-scale production in 2025.

TSMC will start 2nm production at fab 20 in the Baoshan area of Hsinchu Science Park in Taiwan and plans to begin phased mass production at a new factory in Taichung Central Science Park starting in 2026.

Relevant information shows that TSMC (TSMC) has planned to build three wafer fabs in Kaohsiung, with P1 and P2 producing 2nm process chips. The P3 facility has begun construction planning, license application, and on-site work, with completion and license application expected in 2026, producing 2nm or more advanced process chips.

TSMC has ensured that Apple will be a customer for the 2nm process. Apple plans to apply the 2nm process to the application processor (AP) scheduled for installation in the iPhone 17. Apple previously installed the A17 AP, which uses TSMC's 3nm process, in the iPhone 15 Pro series released in 2023.

TSMC's Vice President Zhuang Zishou attended the public meeting for the environmental impact statement of the expansion plan, stating that the five factories in Kaohsiung are estimated to employ 8,000 people. TSMC pointed out that the Kaohsiung factories are progressing according to schedule, in line with government procedures. According to TSMC's expansion plan, the P4 and P5 factories are expected to start construction planning, license application, and on-site work in 2025, with completion and license application expected in 2027.

Benefiting from the demand for high-performance computing and artificial intelligence, TSMC's CoWoS advanced packaging capacity is in short supply while expanding advanced manufacturing plants. This has also prompted the giant to increase its layout in this area According to reports, TSMC currently has five advanced packaging and testing factories in Taiwan: Hsinchu, Tainan, Longtan in Taoyuan, Taichung, and Zhunan in Miaoli. The advanced packaging and testing factory 5 (AP5) located in the Central Taiwan Science Park is expected to start mass production of CoWoS in the first half of 2025; the advanced packaging and testing factory 6 (AP6) in Zhunan, Miaoli integrates SoIC, InFO, CoWoS, and advanced testing, planning various TSMC 3D Fabric advanced packaging and silicon stacking technology capacities.

As for TSMC's advanced packaging and testing factory 7 (AP7) in Chiayi, construction began in May this year, and the industry expects mass production of SoIC and CoWoS in 2026. In August this year, TSMC also spent NT$ 17.14 billion to purchase a factory from Innolux in the Southern Taiwan Science Park.

Due to the continuous shipment of NVIDIA's B series chips, in addition to advanced processes, advanced packaging capacity is also tight. Currently, major customers of NVIDIA's GB200, including Microsoft, Amazon, Oracle, Meta, and Google, are positioning themselves in advance; TSMC's CoWoS advanced packaging capacity is planned to double by 2025, with supply and demand expected to balance between 2025 and 2026.

In Conclusion

While aggressively promoting wafer fabs elsewhere, TSMC also announced at the beginning of August that its first factory in Europe has begun construction. This manufacturing plant, located in Dresden, Germany, is expected to cost $11 billion. TSMC holds a 70% stake in this joint venture called European Semiconductor Manufacturing Company, while German automotive chip manufacturer Infineon Technologies, Dutch NXP Semiconductors, and automotive parts supplier Bosch each hold 10% stakes.

Data shows that the factory is expected to be operational by the end of 2027, and upon completion, it will produce 40,000 wafers. This factory will not be used for producing the company's most advanced chips but will focus on 28nm, 22nm, and 16/12m nodes.

Meanwhile, TSMC is also increasing its investment in processes.

For example, in silicon photonics, according to Taiwanese media, TSMC has recently completed the integration of Co-Packaged Optics (CPO) and semiconductor advanced packaging technology, and samples are expected to be gradually delivered starting early next year, allowing it to enter the 1.6T optical transmission generation in the second half of 2025 and seize this business opportunity. The industry estimates that Broadcom and NVIDIA are expected to become TSMC's first customers, helping TSMC secure CPO orders.

There are reports that TSMC and Broadcom's jointly developed key technology for CPO, the Micro-Ring Modulator (MRM), has successfully undergone trial production in the 3nm process, indicating that subsequent CPO will have the opportunity to integrate with high-performance computing (HPC) or ASIC chips for AI applications, allowing computational signals to advance to faster optical transmission signals.

With this comprehensive layout, TSMC's performance is impressive. This makes the pursuits of Samsung, Intel, and Rapidus seem even more challenging. Moreover, as TSMC expands its presence, how the future chip supply chain will develop remains uncertain! Source: Semiconductor Industry Observation, Original title: "Has TSMC Done It?"

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